shiftregister
A SIPO (Serial-In-Parallel-Out) shift register. Can be built with any word size determined by the number of output pins. Each time the clock input is turned on, the register shifts one bit to the left and it’s first bit is set to the current state of the data pin. An optional reset pin can be added. When it’s triggered the register is cleared.
on Wikipedia
I/O setup
- Should have 2 or 3 inputs. Can have any number of outputs.
- Input pin 0: clock input.
- Input pin 1: data input.
- Input pin 2: optional reset pin.
Sign text
shiftregister
Version history: Added to BasicCircuits 0.1
